TSMC (Minutes): Full-year revenue growth rate revised up to 30%
TSMC released its Q2 2025 financial report (ending June 2025) before the U.S. stock market opened on the afternoon of July 17, 2025, Beijing time.
Below are the minutes of TSMC's FY25 Q2 earnings call. For an interpretation of the financial report, please refer to "The Resilient TSMC is the True Backbone of the Semiconductor Industry!"
I.$Taiwan Semiconductor(TSM.US) Review of Core Financial Information
1. Revenue Overview
(1) Q2 2025 Revenue: Revenue in New Taiwan dollars grew by 11.3% quarter-on-quarter, and in U.S. dollars, it grew by 17.8% to $30.1 billion, exceeding expectations. This was driven by strong demand for our industry-leading 3nm and 5nm technologies, although partially offset by adverse exchange rate impacts.
(2) Technology Revenue Share:
3nm: 24% of wafer revenue
5nm: 36% of wafer revenue
7nm: 14% of wafer revenue
Advanced technologies (7nm and below): 74% of wafer revenue
(3) Platform Revenue Share:
HPC: Up 14% quarter-on-quarter, accounting for 60% of revenue
Smartphones: Up 7% quarter-on-quarter, accounting for 27% of revenue
IoT: Up 14% quarter-on-quarter, accounting for 5% of revenue
Automotive: Flat, accounting for 5% of revenue
DCE: Up 30% quarter-on-quarter, accounting for 1% of revenue
2. Financial Metrics
(1) Gross Margin: Down 0.2 percentage points quarter-on-quarter to 58.6%, mainly due to adverse exchange rates and margin dilution from overseas wafer fabs, but partially offset by improved capacity utilization and cost optimization measures.
(2) Operating Margin: Up 1.1 percentage points quarter-on-quarter to 49.6%.
(3) EPS: NT$15.36, up 60.7% year-on-year.
(4) ROE: 34.8%.
(5) CapEx: NT$297 billion ($9.6 billion).
3. Balance Sheet
(1) Cash and Marketable Securities: NT$2.6 trillion, equivalent to $90 billion.
(2) Current Liabilities: Decreased by NT$22 billion quarter-on-quarter, mainly due to tax payments, accrued liabilities, and other items reducing by $38 billion.
(3) Financial Ratios: Days sales outstanding decreased by 5 days to 23 days, mainly due to the appreciation of the New Taiwan dollar, as almost all receivables are in U.S. dollars. Inventory turnover days decreased by 7 days to 76 days, mainly due to increased shipments of N3 and N5 wafers.
4. Q3 2025 and Full-Year Guidance
(1) Revenue: Between $31.8 billion and $33 billion, up 8% quarter-on-quarter, with a 38% year-on-year increase at the midpoint.
(2) Gross Margin: Assuming an exchange rate of $1 to NT$29, expected to be between 55.5% and 57.5%. Due to continued adverse exchange rates and more pronounced margin dilution from overseas wafer fabs as capacity ramps up in Kumamoto and Arizona.
(3) Operating Margin: Approximately 45.5%.
(4) Full-Year Revenue Target: Expected to grow approximately 30% in U.S. dollar terms for the full year 2025 (upgraded from the previous expectation of around 25%).
(5) Full-Year CapEx Plan: Maintained at $38-42 billion.
II. Detailed Content of TSMC's Earnings Call
2.1 Executive Statements on Core Information
1. Profitability and Margin Outlook
Gross Margin: The actual exchange rate was $1 to NT$31.05, which had an adverse impact of approximately 220 basis points on the actual gross margin. The ramp-up of overseas wafer fab capacity also had an impact of slightly over 100 basis points, mainly due to the declining margins at the Arizona wafer fab.
Exchange Rate Impact: Revenue is denominated in U.S. dollars, while approximately 75% of sales costs are denominated in New Taiwan dollars. The New Taiwan dollar appreciated by about 4.4% quarter-on-quarter, which had a negative impact of approximately 180 basis points on our Q2 New Taiwan dollar revenue and gross margin.
Outlook: Based on the current exchange rate of $1 to NT$29, the New Taiwan dollar is expected to appreciate by another 6.6% quarter-on-quarter, which will have a negative impact of 6.6% on Q3 New Taiwan dollar revenue and gross margin. Despite adverse exchange rates, we believe a long-term gross margin of 53% or higher is achievable. We will leverage the expanding scale in Arizona and are committed to operations to improve cost structure.
2. Market and Demand Outlook
AI Demand: Continued strong growth in demand related to artificial intelligence and high-performance computing (HPC), including increasing demand from autonomous AI. The explosive growth in token transaction volume indicates increasing usage and adoption rates of AI models, which means more computing is needed, driving demand for cutting-edge silicon wafers.
Tariff Policy: No changes in customer behavior have been observed.
Future Guidance: Business in Q3 is expected to be driven by strong demand for our advanced process technologies.
3. Global Expansion
Progress of U.S. Factories: Plans to establish six advanced wafer manufacturing plants, two advanced packaging plants, and a large R&D center in Arizona. The company's first plant successfully achieved mass production in Q4 2024, using N4 process technology, with yields comparable to Taiwan wafer fabs. The second wafer fab will use 3nm process technology, and construction is complete. Construction of the third wafer fab (which will use 2nm and A16 process technology) has started. The fourth wafer fab will use N2 (2nm) and A16 process technology. The fifth and sixth wafer fabs will use more advanced technologies.
Japan Factory: The first specialty technology factory in Kumamoto started mass production at the end of 2024; construction of the second specialty factory is planned to start later this year;
Germany Factory: Plans to build a specialty technology factory in Dresden, Germany are progressing smoothly;
Taiwan: Plans to build 11 wafer manufacturing plants and 4 advanced packaging plants in the coming years; preparing to build 2nm wafer fabs in multiple phases in the Hsinchu Science Park and Kaohsiung Science Park;
4. Technology Updates
N2 technology is scheduled to enter mass production in the second half of 2025, with a capacity ramp-up curve similar to N3 (3nm);
N2P further optimizes performance and power consumption based on N2, with mass production planned for the second half of 2026;
A16 is expected to achieve mass production in the second half of 2026;
Continuing the strategy of continuous improvement for the A14 chip, with mass production planned for 2028;
2.2 Q&A Session
Q: You mentioned that AI demand is certainly better than three months ago. Last quarter, you also mentioned that CoWos capacity might reach equilibrium in 2026. Do we still believe this?
A: AI demand remains strong, as does demand for CoWos. The company is working hard to close the gap, and the market remains very healthy.
Q: Compared to 3 to 6 months ago, how has customer development progressed in edge AI? Has their interest or level of investment changed? How do you see this trend?
A: It usually takes customers 1 to 2 years to complete new product designs. Although the growth in shipments of edge devices is moderate, the die size continues to grow, increasing by about 5% to 10%. This trend continues, and it is expected to take another 6 months to 1 year to see more significant progress.
Q: Regarding gross margin, the cumulative exchange rate impact has reached almost 4.4 percentage points, which is significant. When TSMC considers wafer pricing for 2026 (the so-called pricing that reflects its own value), will this exchange rate impact be taken into account? Is there confidence in maintaining a gross margin similar to this year?
A: The impact of exchange rates is indeed significant. We are working to address this issue. We are confident in achieving a gross margin of 53% or higher, and I hope everyone focuses on "or higher."
Q: Given the issue of H20 chip shipments to China, is there a possibility for TSMC to raise the target of a 45% median annual compound growth rate for AI semiconductors over the next five years?
A: Regarding H20, the opening of the Chinese market is positive news, and customers can still supply to China, which is positive for both them and TSMC. However, no clear signals have been received yet, so it is too early to raise the forecast now, and it may be more appropriate to answer this question next quarter.
Q: The capacity ramp-up curve for N2 is similar to N3 (3nm). What does this mean? Of course, how much can we expect N2 to contribute to revenue in 2026, or how much information can we disclose?
A: The company will leverage the smartphone sector to ramp up capacity for new process nodes. Not only the smartphone sector, but also the high-performance computing (HPC) product sector will be involved. Because the company's ability to ramp up capacity is limited by the construction of new wafer fabs, the capacity ramp-up curve for N2 (2nm) is similar to N3 (3nm), but its contribution to revenue will certainly be greater, as 2nm is priced higher.
Q: Since it takes 12 to 18 months to build a new wafer fab, should you be able to achieve higher growth in N2 by 2027?
A: This question will be answered in 2026.
Q: What is the outlook for supply and demand for N5 and N3 processes over the next two years? Especially as AI products migrate to N3, will N3 capacity be very tight over the next three years? Can TSMC reflect higher value or pricing as a result? Meanwhile, will N5 process capacity utilization decline?
A: Currently, N3 capacity is very tight and is expected to remain so for several years; N5 is also still tight. As many AI products are still using 4nm processes, they will gradually shift to 3nm over the next two years, leading to higher demand for N3. TSMC is actively expanding capacity, including launching new capacity clusters to meet demand for N7, N5, N3, and even future N2. Although this is not without cost, for TSMC, adjusting or converting capacity between these nodes is much easier.
Q: Facing structural pressure from adverse exchange rates and overseas costs, can TSMC offset these impacts by adjusting wafer prices to achieve the value it deserves?
A: Regarding gross margin: Although exchange rates and overseas costs are structural challenges, TSMC can rely on multiple factors (not just price increases) to offset negative impacts, so there is still confidence in achieving the 53% or higher gross margin target.
Q: How much economic benefit can TSMC's introduction of AI into its operations bring?
A: Regarding the benefits of AI: TSMC has applied AI in manufacturing and R&D, and even a 1% productivity improvement is equivalent to about $1 billion in benefits for a company of this scale.
Q: Why is TSMC expanding wafer fabs on a large scale both in Taiwan and overseas? This is an unprecedented scale of expansion, and facing continued strong demand for data centers, does TSMC plan to accelerate the conversion of 5nm capacity to 3nm?
A: Recently, global AI data center demand has surged, and demand for 5nm, 3nm, and future 2nm processes is very strong, a level of demand TSMC has not seen for a long time. Nevertheless, the company is working hard to ensure sufficient capacity to support these demands.
Q: Compared to N3, how is the return on investment (ROI) for N2? Despite higher CapEx, how is the yield performance for N2? What are the latest developments in the 2nm process?
A: N2's profitability is better than N3, and it is expected to return to the faster payback speed of the past. Although the average gross margin for N3 was about 50% in the past, now N2 is 53%, comparing time is meaningless, but structurally N2 is still more profitable. N2 R&D is progressing smoothly, mass production is expected to start in the second half of this year, and revenue contribution will begin in the first half of next year.
Q: Despite the upward revision of the 2025 revenue forecast and strong AI demand, why is the 2025 CapEx still maintained at the range of $38-42 billion? Is this due to macroeconomic uncertainty or construction constraints? What is the outlook for CapEx in 2026 and 2027?
A: CapEx is prepared for future business opportunities, and as long as there are opportunities, the company will continue to invest. Given current macro uncertainties, TSMC is cautious in planning capacity and CapEx. The specific situation of CapEx in the coming years is not yet clear, but as a large company, CapEx is unlikely to see a significant decline.
Q: What is TSMC's revenue growth expectation for AI accelerators in 2025? What are the company's plans for CoWoS (wafer-level packaging) capacity expansion in 2025 and 2026?
A: TSMC is working hard to close the capacity gap, and demand remains strong in 2026. The company is building multiple new backend plants to expand CoWoS capacity to support customers' AI needs, and demand for both AI and CoWoS is very strong.
Q: In the field of artificial intelligence, the die size of chips is constantly increasing, and the requirements for power consumption or energy efficiency are also increasing. How does the company's strategy in advanced packaging align with the development of advanced process nodes? Are there specific packaging solutions that are prioritized?
A: In the field of advanced packaging, many customers adopt different approaches. Therefore, we are developing a variety of different advanced backend packaging technologies for all customers.
Q: How is the interoperability between different packaging technologies? Is technology conversion and application convenient?
A: Of course, there are some similarities between them.
Q: Across the industry, there is excess capacity in older process nodes. For example, with 16nm and older process nodes, what is the company's strategy?
A: There seems to be a lot of capacity in mature process nodes. But TSMC's strategy in mature process technology is actually to develop various specialty processes. For example, RF technology, CMOS image sensor technology, or high-voltage technology. These technologies are developed in response to customer demand.
Q: How does TSMC assess the market size for humanoid robots? In leading processes and mature processes (including certain specialty processes), how significant are the long-term opportunities for TSMC in humanoid robots?
A: Humanoid robots are still in a very early stage, and it is difficult to see significant applications in the short term (this year and next year). The technology is very complex, involving multiple sensors and complex feedback systems, and direct interaction with humans requires extremely high safety. Once mature in the future, the potential is huge, and some customers expect the market size to far exceed electric vehicles.
Q: Are there any customers trying to bring forward demand for 2026 to the second half of this year? Any additional comments on the fourth quarter?
A: Currently, no customers are bringing forward demand to the second half of this year. For example, with 3nm, the manufacturing cycle is about 4 months, and capacity is very tight, with production schedules full, so even if customers want to bring forward demand, it is difficult to achieve. Demand for 2026 is still proceeding as planned.
Q: What is TSMC's expectation for CapEx in response to the upcoming multi-year strong demand for 2nm?
A: CapEx is an investment for future growth opportunities, and as long as revenue growth exceeds CapEx growth, capital intensity will not be high. We do not set capital intensity as an operational target. The actual amount of CapEx depends on structural demand growth in the coming years.
Q: In the past, AI used process nodes that were usually one node behind the leading edge. Will this change in the future? For example, how is the adoption trend of AI in leading nodes like A16?
A: Typically, high-performance computing (HPC) customers are always one step behind when using N+1 or N+2 technology. But due to strong AI demand, the adoption speed is accelerating.
AI applications particularly emphasize performance and power consumption, with A16 improving energy efficiency by about 20%, which is very valuable for AI data centers. AI data centers have extremely high power demands, and power supply becomes critical, highlighting the importance of energy efficiency. A16 is a further enhancement of the N2 node, and TSMC is not surprised that AI data center customers are actively adopting A16 technology.
Q: How will the accelerated construction plan for the second U.S. wafer fab proceed? What impact does the recently passed U.S. International Trade Commission Act (ITC) have on the progress of U.S. expansion? What impact do these factors have on overseas margin dilution?
A: The production schedule for U.S. wafer fabs is mainly driven by customer demand. The U.S. government has increased the investment tax credit (ITC) from 25% to 35%, which is helpful to the company. The profit impact of the Chips and Science Act (ITC) is positive, but not significant within 5 years, as ITC is used to offset asset value, and benefits are gradually realized through depreciation amortization.
Q: How does the accelerated expansion of the U.S. wafer fab cluster affect the company's expansion plans in Japan and Europe? Will it cause adjustments or delays?
A: In TSMC's overseas expansion layout: U.S. wafer fabs focus on advanced processes; Japan mainly invests in specialty processes, primarily CMOS sensors; Germany mainly serves the automotive industry.
Therefore, the expansion fields in different regions are different and do not affect each other, and the expansion in the U.S. will not affect investment plans in Japan and Germany.
<End here>
Risk Disclosure and Statement of this Article:Dolphin Research Disclaimer and General Disclosure
