Changes in HBM Packaging Technology: Samsung and SK Hynix Both Delay Introduction of HBM Hybrid Bonding

Samsung Electronics and SK Hynix are reevaluating the timeline for introducing hybrid bonding technology in the high-bandwidth memory (HBM) sector. As HBM thickness standards are gradually relaxed and alternative solutions for heat dissipation emerge, the commercialization node for this next-generation packaging technology, once highly anticipated, has been repeatedly pushed back.

According to a report by South Korean tech media ZDNet Korea on Monday, industry observers pointed out that the timing for the full application of hybrid bonding technology in next-generation HBM may be later than previously expected. The two companies initially expected to introduce the technology as early as HBM4 (the sixth generation of HBM), but ultimately retained the traditional thermocompression bonding (TC bonding) solution.

Currently, the industry predicts that the introduction node for hybrid bonding may be delayed to 16-layer HBM4E (the seventh generation of HBM), while some industry insiders believe the actual timeline may be further postponed.

This change has a direct impact on the HBM supply chain and related packaging equipment manufacturers. The delay in hybrid bonding technology means an extended lifecycle for existing TC bonding processes, and the pace of capital expenditure surrounding hybrid bonding equipment and materials will be adjusted accordingly.

Relaxation of Thickness Standards Weakens Core Advantage of Hybrid Bonding

The main advantage of hybrid bonding technology lies in its bump-less structure, which allows direct connection of copper wires between DRAM layers, thereby making it easier to compress the overall thickness of HBM and improve heat dissipation performance and power efficiency. However, the market urgency for these advantages is declining.

Thickness standards in the HBM industry have shown a trend of gradual relaxation. The standard thickness for HBM was 720 microns for HBM3E (fifth generation) and has been increased to 775 microns for HBM4, primarily because the number of stacked layers has increased from 8 and 12 layers to 12 and 16 layers. It is reported that the international semiconductor standardization body JEDEC is currently discussing further relaxing the upper thickness limit for 20-layer stacked products like HBM5 from 900 microns to approximately 1,000 microns. Once thickness constraints are loosened, the spacing between DRAM layers does not need to be compressed to the limit, and the technical pressure on TC bonding will be correspondingly reduced.

At the same time, the demand timeline for high-stack HBM from core customers such as Nvidia has also shifted backward. An industry insider A stated, "Currently, discussions between customers and memory manufacturers regarding 16-layer HBM are not active. For now, even in HBM4E, 12-layer products are very likely to continue dominating."

Emergence of Alternative Thermal Solutions, Two Companies Take Different Paths

Improved heat dissipation performance is another major selling point of hybrid bonding—removing underfill materials with low thermal conductivity helps enhance HBM thermal characteristics. However, Samsung Electronics and SK Hynix have separately developed alternative thermal technologies that do not rely on hybrid bonding.

The core of both companies' solutions is the additional integration of independent heat dissipation devices alongside the HBM core chip. Samsung Electronics has named its solution the Heat Path Block (HPB), while SK Hynix calls its solution iHBM (ICE HBM). Both companies are currently testing the application of these technologies for HBM5.

An individual from the packaging industry stated, "Configuring heat dissipation devices alongside the HBM core chip is not technically difficult, and there should be no obstacles to commercialization. From the perspective of memory companies, this is a stable choice."

I/O Density Bottleneck May Become the Ultimate Driver for Hybrid Bonding

Despite the short-term delay in the introduction schedule, Samsung Electronics and SK Hynix are expected to continue advancing their R&D efforts in hybrid bonding technology. The driving force comes from the explosive growth demand for I/O density in the long-term evolution path of HBM.

HBM4 has doubled the number of I/Os from 1,024 in HBM3E to 2,048, significantly narrowing the internal spacing within HBM. TC bonding involves lateral diffusion during bump melting, which the industry considers difficult to support higher-density I/O implementations. An individual from the packaging industry C pointed out, "In the medium to long term, the industry is discussing doubling the number of I/Os again to 4,096 starting from HBM5E. At that time, the I/O pitch will be extremely tight, making hybrid bonding a necessary option."

This means that hybrid bonding technology has not been abandoned but merely postponed—its true commercial window may reopen with the critical breakthrough in I/O density during the generational evolution of HBM.