Track Hyper | Intel's marriage with Taiwan Semiconductor: A dangerous experiment

Author: Zhou Yuan / Wall Street Insight

On April 4th, the global semiconductor industry witnessed a historic turning point—Intel and Taiwan Semiconductor Manufacturing Company (TSMC) announced a preliminary agreement to establish a joint venture to operate Intel's chip manufacturing plants.

According to the agreement, TSMC will hold a 20% stake in the new company through a technology equity investment, while Intel and other U.S. semiconductor companies will hold the majority stake (a total of 80%). The joint venture will also take over three advanced manufacturing plants owned by Intel in Oregon and Arizona.

Regarding the authenticity of this matter, Intel's official response to Wall Street Insight was one of "no comment."

Typically, such statements are interpreted by the market as a tacit acknowledgment of the rumors surrounding the company.

This collaboration is viewed by outsiders as a key step in the U.S. government's push for the "return of chip manufacturing" strategy and a result of the White House's urgent mediation following the repeal of the CHIPS Act.

It is noteworthy that TSMC's stake is not purchased with cash but achieved through "technology sharing + employee training" equity exchange.

This arrangement not only circumvents Intel's current cash flow issues—Intel's annual report shows a net loss of $18.8 billion in 2024 (a staggering 1205.88% drop from a net profit of $1.7 billion in 2023, marking Intel's first annual net loss since 1986 and the worst loss in its 30-year financial history)—but also allows TSMC to inject its 2nm and 3nm advanced process technologies into domestic U.S. production capacity.

On the day the news was announced, Intel's stock price rose 2.05% against the trend, while TSMC's stock price fell, indicating differing views in the capital market regarding this collaboration.

TSMC's stock performance on that day did not align with Intel's, possibly because TSMC had previously planned to invest $165 million in its Fab 21 plant in Arizona to manufacture chips for partners, including Apple.

How to maintain consistency and avoid conflicts between this investment plan and the 20% equity joint venture with Intel?

TSMC's investment is not a one-way technology output.

The agreement stipulates that Intel must open its packaging technology patent library to the joint venture, including Foveros 3D stacking and EMIB (Embedded Multi-Die Interconnect Bridge) technology.

This exchange condition has been referred to by U.S. media as "the most complex intellectual property transaction in U.S. semiconductor history": by integrating TSMC's advanced processes with Intel's packaging technology, the joint venture is expected to achieve mass production of 2nm chips by 2026 and develop high-performance heterogeneous chips for AI and quantum computing.

In recent years, Intel has been mired in technological bottlenecks and financial difficulties, with its foundry business "Intel Foundry" (IF) suffering losses for three consecutive years, totaling $25.6 billion: cumulative losses of $12.2 billion from 2022 to 2023, with operational losses further expanding to $13.4 billion in 2024.

On the technological front, Intel's advanced process development below 7nm has lagged behind TSMC by at least two generations—TSMC's 3nm chips have already entered mass production in 2023, while Intel's similar products are expected to begin production by the end of 2025 at the earliest It seems that only Intel and the American side are reaping the benefits of this joint venture, while TSMC is not only restricted in its equity ratio—capped at 20%—but also faces the risk of technology transfer, as TSMC is required to open at least 30% of its 3nm process patents to the joint venture, which may weaken its technological barriers.

For TSMC, the joint venture is both an opportunity and a shackle: in the short term, it can expand its market share in the U.S. (expected to gain orders from clients like Apple and Nvidia), but in the long term, it faces the risk of technology diffusion, overall resulting in greater losses than gains.

So, what exactly is TSMC aiming for?

After the news broke on April 4th, TSMC's stock price in the U.S. plummeted by 6.72%, reflecting the capital market's attitude.

For Intel, the joint venture with TSMC also has potential risk points.

For example, technological marginalization: excessive reliance on TSMC could lead to the marginalization of Intel's own technology, even triggering large-scale layoffs. This is because the preparation and materials used by these two competitors are completely different; if TSMC's technology is primarily adopted, Intel's chip manufacturing department will inevitably face layoffs.

The compatibility of Intel's factory equipment with TSMC's processes has also yet to be verified.

For instance, the ASML EUV lithography machine used at Intel's D1X factory in Oregon is a 2022 model, while TSMC's 3nm process requires upgraded equipment from 2024 (according to a SEMI report). Additionally, there are differences in the material supply chain: Intel mainly sources deposition equipment from U.S.-based Applied Materials, while TSMC relies on technology from Japan's Tokyo Electron.

These issues could become obstacles for this joint chip company, which is still in progress and has yet to reach a final outcome, in whether its future business development can proceed as envisioned.

At the industry level, Intel plans to transfer 40% of its manufacturing capacity to the joint venture, transforming into a "design + partial manufacturing" hybrid model, breaking its 50-year tradition of IDM (Integrated Device Manufacturing).

The "marriage" that these former competitors are forced to implement under irresistible pressure may have a possible consequence: EU antitrust review.

The joint venture plan between TSMC and Intel may involve issues of technology integration and market share concentration. If their combined share in the global foundry market exceeds 50% (TSMC currently holds a 61% market share, while Intel's foundry business accounts for less than 5%), it may trigger a review under the EU Merger Regulation.

The union between Intel and TSMC is essentially a product of non-technical, commercial, and market-level irresistible forces, such as geopolitical competition.

Against the backdrop of fluctuating Trump policies, insurmountable technological gaps, and significant internal integration resistance, this cooperation resembles a high-risk experiment.

The success or failure of this experiment not only concerns the fate of the two giants but will also determine the direction of the global semiconductor power structure.

As of now, this agreement between the two parties has not yet truly materialized.

However, the driving force behind this "marriage" does not stem from commercial logic, and history has proven that unions that violate market laws often come at a higher cost.

So, who will bear this cost? Who will be responsible for it? History will provide the answer